# Intel T2300 and SSE3 [solved]

## rahulthewall

On checking the CPU flags from /proc/cpuinfo today I say that it was not reporting SSE3 as one of the CPU flags - yet I do remember that my processor supports SSE3. 

```

rahul@googly ~ $ cat /proc/cpuinfo | grep flags

flags           : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe nx constant_tsc arch_perfmon bts aperfmperf pni monitor est tm2 xtpr pdcm

```

So, I checked using CPUID. Here is the program.

```

#include <iostream>

using namespace std;

int main(int argc, char **argv)

{

        int b;

        int a = 1;

        asm("cpuid" : "=c"(b) : "a"(a));

        cout << a << endl << b << endl;

}

```

The output returned was 1100000110001001 => last bit is 1 therefore sse3 is supported.

Moreover, google (and wiki) also report that SSE3 is supported. Can someone please explain why is not reported by the /proc/cpuinfo?

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## aCOSwt

 *rahulthewall wrote:*   

> 
> 
> rahul@googly ~ $ cat /proc/cpuinfo | grep flags
> 
> flags           : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe nx constant_tsc arch_perfmon bts aperfmperf pni monitor est tm2 xtpr pdcm

 I read somewhere that pni is an equivalent for sse3 as a matter of fact, the old naming of sse3.

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## rahulthewall

From wikipedia:

```
SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions (PNI), is the third iteration of the SSE instruction set for the IA-32 architecture. 
```

This thing should be renamed to sse3 to avoid confusion.  :Smile: 

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